AD605ARZ is a dual-channel, low-noise, voltage-controlled programmable gain amplifier (PGA) designed and manufactured by Analog Devices Inc. (ADI). It belongs to the high-precision AD60x family, engineered specifically for wide-dynamic-range signal conditioning in instrumentation, medical imaging, ultrasonic systems, and communication receivers, where precise, stable, and independently controllable gain — from –11.5 dB to +30 dB (spanning >40 dB) — with excellent bandwidth, low distortion, and minimal noise is essential.
The “ARZ” suffix denotes the 16-lead SOIC package (10 mm × 4 mm) — a standard, surface-mount, thermally enhanced, and widely manufacturable package; it is Pb-free, RoHS-compliant, and qualified for industrial temperature range (–40°C to +85°C ambient).
⚠️ Critical Clarification:
The AD605 is not a digital potentiometer-based or discrete op-amp + VGA IC. It is a fully integrated, dual-channel, analog-domain PGA featuring:
- Two independent, matched gain channels, each with differential input and single-ended output, sharing only the gain-control interface — enabling true channel-to-channel tracking (< 0.05 dB mismatch over temperature);
- Linear-in-dB gain control: Gain = 20 × log₁₀(VGAIN), set by a single 0.5 V to 2.5 V analog voltage (VG), delivering precise 1 dB/10 mV scaling — ideal for automatic gain control (AGC), time-gain compensation (TGC) in ultrasound, and calibrated test equipment;
- Ultra-low noise: 1.4 nV/√Hz (typ.) input voltage noise, 2 pA/√Hz input current noise, and < –90 dBc THD @ 100 kHz — preserves SNR even at maximum gain;
- High bandwidth & slew rate: 30 MHz small-signal bandwidth (–3 dB), 500 V/µs slew rate, with < 20 ns group delay variation across gain settings — suitable for wideband RF/IF and fast transient signals;
- True differential input architecture: Each channel has fully balanced, high-impedance (10 MΩ || 2 pF) inputs — enabling rejection of common-mode noise (e.g., ECG interference, motor drive coupling) without external instrumentation amps.
It operates from ±5 V dual supplies, consumes 22 mA per channel (44 mA total), and delivers ±2.5 V output swing into 100 Ω loads — all while maintaining < 0.1% gain error and < 100 µV offset drift over temperature.
Introduction
The AD605ARZ delivers laboratory-grade programmable gain performance in a compact, production-ready SOIC-16 package:
🔹 Dual-channel precision with tracking: Two identical PGAs on one die ensure near-perfect matching — critical for phased-array ultrasound, differential sensor readout, and I/Q demodulation;
🔹 True linear-in-dB control: Unlike digital-step PGAs with coarse resolution, its analog VG input provides infinite resolution and seamless gain sweeps — eliminating zipper noise in audio and artifacts in medical imaging;
🔹 Wide gain range with flat response: From –11.5 dB (attenuation) to +30 dB (gain) — all with < 0.2 dB passband ripple and < 0.5 dB gain flatness up to 10 MHz — enabling flexible front-end scaling without sacrificing bandwidth;
🔹 Robust, simple integration: Requires only two external decoupling caps per supply rail, plus optional feedback resistors if using non-standard gain ranges — no external op-amps, DACs, or calibration circuitry needed.
Its SOIC-16 (ARZ) package (10 mm × 4 mm) offers excellent thermal performance (θJA ≈ 85°C/W), supports AOI inspection, and is compatible with standard reflow profiles — making it ideal for high-reliability industrial, medical, and telecom systems.
Key Features
✅ Dual-Channel Programmable Gain Architecture:
• Two independent PGAs: Channel A and Channel B, each with differential input (INA+/–, INB+/–) and single-ended output (OUTA, OUTB);
• Gain range: –11.5 dB to +30 dB, controlled by analog voltage VG (0.5 V to 2.5 V);
• Gain law: G = 20 × log₁₀(VG), i.e., 1 dB per 10 mV — linear-in-dB with ±0.1 dB accuracy (typ.);
• Channel matching: < 0.05 dB gain mismatch, < 1° phase mismatch over full range/temp.
✅ High Performance & Low Distortion:
• Input voltage noise: 1.4 nV/√Hz (typ.);
• Input current noise: 2 pA/√Hz (typ.);
• THD: < –90 dBc @ 100 kHz (G = +30 dB, RL = 100 Ω);
• Bandwidth: 30 MHz (–3 dB, G = +30 dB), >10 MHz flat to ±0.2 dB;
• Slew rate: 500 V/µs.
✅ Precision DC Characteristics:
• Input offset voltage: < 0.5 mV (max), drift < 5 µV/°C;
• Gain error: < ±0.1% (max) over full range;
• Common-mode rejection ratio (CMRR): > 80 dB (DC to 1 MHz);
• Power supply rejection ratio (PSRR): > 75 dB (DC to 100 kHz).
✅ Flexible Operation & Protection:
• Supply voltage: ±5 V (±4.5 V to ±5.5 V);
• Quiescent current: 22 mA per channel (44 mA total);
• Output swing: ±2.5 V into 100 Ω, ±3.0 V into high-Z;
• ESD rating: > 2 kV HBM on all pins.
✅ SOIC-16 (ARZ) Package & Industrial Qualification:
• 16-Lead SOIC (10 mm × 4 mm);
• RoHS-compliant, halogen-free;
• Operating ambient temperature: –40°C to +85°C;
• JEDEC J-STD-020 moisture sensitivity level (MSL) 3.
Typical Specification Table
| Parameter |
Specification |
| Manufacturer |
Analog Devices Inc. (ADI) |
| Product Series |
AD60x Family (Programmable Gain Amplifiers) |
| Model |
AD605ARZ |
| Function |
Dual-Channel Voltage-Controlled PGA |
| Gain Range |
–11.5 dB to +30 dB |
| Gain Control Law |
G = 20 × log₁₀(VG); 1 dB / 10 mV |
| VG Input Range |
0.5 V to 2.5 V |
| Gain Accuracy |
< ±0.1% (max) |
| Input Voltage Noise |
1.4 nV/√Hz (typ.) |
| THD @ 100 kHz |
< –90 dBc (G = +30 dB, RL = 100 Ω) |
| Small-Signal BW (–3 dB) |
30 MHz (G = +30 dB) |
| Slew Rate |
500 V/µs |
| Supply Voltage |
±5 V (±4.5 V to ±5.5 V) |
| Quiescent Current |
22 mA per channel (44 mA total) |
| Package |
16-Lead SOIC (10 mm × 4 mm) (ARZ) |
| RoHS / Green |
Yes (Pb-free, Halogen-free) |
| Packaging |
Tube or Tape-and-Reel (standard ARZ packaging) |
Typical Applications
🔹 Ultrasound Beamforming & TGC: Time-gain compensation in portable and cart-based ultrasound systems — leveraging dual-channel matching, linear-in-dB control, and wide bandwidth for clean echo amplification across depth.
🔹 Medical Instrumentation: ECG/EEG front-ends, patient monitors, and defibrillator analyzers — using differential inputs for high CMRR and low noise to resolve microvolt-level bio-signals.
🔹 Communications Receivers: IF/RF gain control in software-defined radios (SDRs), spectrum analyzers, and base stations — enabled by fast settling (< 100 ns), low distortion, and wide dynamic range.
🔹 Precision Test & Measurement: Automated test equipment (ATE), oscilloscope vertical amplifiers, and calibrated signal generators — benefiting from sub-0.1% gain accuracy and temperature stability.
🔹 Industrial Sensor Signal Conditioning: Strain gauge, piezoelectric, and MEMS accelerometer interfaces — where variable gain compensates for sensor sensitivity spread and cable loss.
🔹 Phased Array & Radar Systems: I/Q channel gain balancing, calibration loops, and adaptive nulling — using channel-to-channel matching and independent control.
Development & Design Notes
🔧 PCB Layout Best Practices:
- Place power decoupling caps (10 µF tantalum + 100 nF ceramic) within 5 mm of each supply pin (±VS) — minimize supply impedance and preserve PSRR.
- Keep VG traces short and shielded (ground guard ring) — 10 mV error = 1 dB gain error; avoid routing near clocks or switching nodes.
- Use symmetric, matched-length traces for differential inputs — preserves CMRR and minimizes phase skew.
🔧 Power Supply Decoupling:
- For best noise performance: use low-ESR ceramic caps (100 nF X7R, 0805) directly at ±VS pins, plus bulk 10 µF tantalum on PCB.
- Add a 10 nF capacitor between +VS and –VS, close to the IC — reduces high-frequency crosstalk between channels.
🔧 Gain Control & AGC Implementation:
- Drive VG with a precision DAC (e.g., AD5686) or filtered op-amp integrator (for analog AGC loop).
- For ultra-stable AGC: add a 100 kΩ series resistor + 10 nF capacitor to VG — filters control-line noise without degrading loop bandwidth.
- Use dual DAC channels to independently program Channel A and B — enables advanced beam-steering or I/Q correction.
🔧 Thermal Management & Reliability:
- SOIC-16 has good thermal capability (θJA ≈ 85°C/W). For continuous operation at full gain (+30 dB), ensure ≥ 100 mm² copper pour under the IC.
- FIT rate = 19 failures per billion hours, with FMEDA report supporting IEC 61508 SIL-2 — combine periodic self-test (e.g., measure gain vs. known VG) for functional safety.
🔧 Calibration & Accuracy Optimization:
- For metrology-grade applications, perform two-point factory calibration (min/max VG) — reduces gain error to < 0.02%.
- To minimize thermal EMFs in differential paths, use same-metal trace routing and avoid solder mask over input traces.
